Abdulrahman Hanoun

Elektroingenieur / FPGA, ASIC Entwickler

Moves to Nürnberg, Nürnberg, Ansbach, Ingolstadt, München

  • 49.4539
  • 11.0773
  • Indicative rate €850 / day
  • Experience 7+ years
Propose a project The project will only begin when you accept Abdulrahman's quote.

Availability not confirmed

Propose a project The project will only begin when you accept Abdulrahman's quote.

Location and geographical scope

Nürnberg, Deutschland
Can work in your office at
  • Nürnberg and 50km around
  • Nürnberg and 100km around
  • Ansbach and 100km around
  • Ingolstadt and 100km around
  • München and 100km around


Project length
  • ≤ 1 week
  • ≤ 1 month
  • Between 1-3 months
  • Between 3-6 months
  • ≥ 6 months
Business sector
  • Research
  • Telecommunications
  • Automobile
  • High Tech



  • Arabisch

    Native or bilingual

  • Englisch

    Full professional proficiency

  • Deutsch

    Full professional proficiency

Skills (29)

Abdulrahman in a few words

Ich bin Unternehmer, Systemarchitekt und gründlicher Entwickler. Ich bin ein promovierter Ingenieur für technische Informatik. Ich entwickle und verifiziere mit Leidenschaft ASIC- und FPGA-Systeme, insbesondere wenn es um Computerarithmetik geht. Ich fordere mich selbst heraus, die delay.area.power Metriken für meine Designs zu verbessern.
Ich entwickle auch Algorithmen mit Matlab und Python für KI und Kryptographie. Ich biete technische und wissenschaftliche Studien für Kunden an.


AprobaTeQ Engineering Products GmbH

High Tech

FPGA Design

Braunschweig, Deutschland

November 2018 - September 2019

Secure Remote Update System in kritischen Einsatzgebiete
Design of Secure and Safe Remote Update System for SIL3 application. The Remote update system consists of On-Chip Flash Memory IP and Flash Controller, DMA, FSM, Command-Processor, configurable CRC unit.
VHDL, C, Max10, Cyclone V, LVDS Communication
  • VHDL
  • FPGA
  • on-chip Flash
  • CRC

Wittenstein KG

High Tech

Senior FPGA Designer

Bad Mergentheim, Deutschland

June 2016 - December 2016

FPGA Design für Antriebstechnik
  • FPGA
  • Intel
  • Altera
  • Max10
  • Antriebstechnik

iAd GmbH

High Tech

ASIC Developing Engineer

Großhansdorf, Deutschland

June 2009 - December 2011

ASIP/ASIC Developing Engineer, iAd GmbH, Grosshabersdorf, Germany.
iAd GmbH is a design and fabricating house for industrial automation and Power-Line Communication (PLC) targeting the emerging Smart-Grids.
- I led the efforts for analysing, designing and implementing industrial security for smart grids and the narrow band power-line communications.
- This joint effort encompasses designing the underlying security ASIPs for ciphering, key management and digital signature.
o Cryptography: cyber-security conception and implementation for the emerging power-line modems I put the security concept for secure communication over power-line modem chips using some cryptography services including authentication,
o Designing a key management, integrity and confidentiality. Cryptography Algorithms such as AES (128-, 192-, and 256-bit), ECDSA, ECDH, Key-Wrap, RSA and others have been developed and implemented on ASIC/ASIP with a thorough and solid understanding in computer arithmetic, controlling fabrics and digital design.
o Designing an ECDSA digital signature ASIP for general prime curves (ANSIx9.62), key management unit with wrapping/unwrapping protection,
o Designing an AES unified for 128-,192-,256-bit keys on several operation modes for encryption and decryption.
o The ECDSA ASIP is very competing in terms of area, performance and side-channel attack resilience
- Digital Analog Backend: concept, designed and verified a novel Low Oversampling Rate High Quality Delta-Sigma Modulation System. (Patent) The novel DSM works for wideband OFDM
  • ASIC
  • Verschlüsselung
  • Energie
  • Cryptography
  • chip design
  • VHDL
  • Matlab
  • OFDM
  • FPGA
  • See more abilities

Schüco KG

Energy & Utilities

Senior Developing Engineer

Bielefeld, Deutschland

January 2012 - December 2012

- Developing hybrid smart systems for managing and storing PV and thermal energies in the presence of conventional fuel-burning generators.
- Responsible for leading the technical work on solutions for PV energy storage as well as load management in self-sufficient smart-homes as part of the E³ product and E-mobility Project.
- Communicate and coordinate work for Schüco with partners and technology providers.
  • PV
  • Solar Energie
  • Matlab
  • Wechselrichter

Sci-Worx Gmbh

High Tech

ASIC Design Engineer

Hittfeld, Deutschland

January 2004 - October 2004

Development of video coding standards for HDTV.
o VHDL/Verilog
o RTL-Design. Major: Video Coding Standards MPEG4/H264.
o C++ system modeling.
  • C++
  • VHDL
  • Verilog
  • H.264
  • MPEG4

Expleo Germany GmbH


Technical Project Leader

Nürnberg, Deutschland

May 2018 - Today

Technical and Discipline Leadership with Account Management responsibilities.
Developing ADAS Solution using Radar and Camera Systems
Artificial Intelligence and Deep Neural Networks.
CNN accelerators (VHDL implementation)
Camera Interface (xilinx IPs)
  • VHDL
  • FPGA
  • Künstliche Intelligenz
  • Camera Systems
  • OpenVino
  • Intel
  • Xilinx
  • Radar
  • SDK
  • ADAS
  • Team Leading
  • cnn
  • SVN
  • See more abilities

Wavelight (Alcon) - Alcon

High Tech

System Archtiect Medical Devices

Erlangen, Deutschland

May 2013 - May 2015

System Architect Medical Devices
I was responsible for developing and maintaining system architecture for Surgical Guidance Eye-Diagnostic Laser Devices. Enterprise Architect (UML). Coordination with Pre-DEvelopment Teams, Development Team and Engineering. Maintaining and assuring development according to ISO 14971:2012. Coordinating SW-Architecture, Electronic Architecture, and Mechanic Architecture.
Leading architecture status meeting.
  • Medizintechnik
  • ISO 262626
  • ISO 14971
  • Matlab
  • OCT
  • System Architecture
  • Polarion
  • Doors
  • UML
  • See more abilities


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